DocumentCode
2367807
Title
CDM tests on interface test chips for the verification of ESD protection concepts
Author
Brodbeck, Tilo ; Esmark, Kai ; Stadler, Wolfgang
Author_Institution
Infineon Technol. AG, Munich
fYear
2007
fDate
16-21 Sept. 2007
Abstract
The CDM failure threshold of microelectronic components are determined by the peak value of the discharge current. The requirements of the market, however, are given in terms of potential. In addition, it is not known how the CDM susceptibility of an IC is affected by its core circuitry. This paper introduces an idea how CDM protection concepts can be checked by tests on an interface test chip to guarantee satisfying product qualifications.
Keywords
electrostatic discharge; integrated circuit testing; CDM failure threshold; CDM tests; ESD protection concepts; charged device mode; core circuitry; discharge current; interface test chips; microelectronic components; CMOS technology; Capacitance; Circuit testing; Electrostatic discharge; Integrated circuit testing; Microelectronics; Packaging; Protection; Qualifications; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
29th Electrical Overstress/Electrostatic Discharge Symposium, 2007. EOS/ESD
Conference_Location
Anaheim, CA
Print_ISBN
978-1-58537-136-5
Type
conf
DOI
10.1109/EOSESD.2007.4401725
Filename
4401725
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