DocumentCode
2368023
Title
Gate oxide reliability characterization in the 100ps regime with ultra-fast transmission line pulsing system
Author
Chen, Tze Wee ; Ito, Choshu ; Maloney, Timothy ; Loh, William ; Dutton, Robert W.
Author_Institution
Stanford Univ., Stanford
fYear
2007
fDate
16-21 Sept. 2007
Abstract
An Ultra-fast Transmission Line Pulsing (UFTLP) system is demonstrated. Very short pulses down to 40 ps with a large voltage range (up to 100 V in this work) can be generated. Gate oxide reliability is quantified in the 100 ps regime for the first time. Hard and soft breakdown transitions are clearly captured, and the results explain why some logic cells still function after breakdown events.
Keywords
reliability; semiconductor device breakdown; breakdown transitions; gate oxide reliability; ultra-fast transmission line pulsing system; Electric breakdown; Grounding; Integrated circuit modeling; Logic; Parasitic capacitance; Pulse circuits; Pulse generation; Switches; Transmission lines; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
29th Electrical Overstress/Electrostatic Discharge Symposium, 2007. EOS/ESD
Conference_Location
Anaheim, CA
Print_ISBN
978-1-58537-136-5
Type
conf
DOI
10.1109/EOSESD.2007.4401738
Filename
4401738
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