DocumentCode :
2368207
Title :
Behavioral synthesis of data-dominated circuits for minimal energy implementation
Author :
Tang, Xiaoyong ; Jiang, Tianyi ; Jones, Alex ; Banerjee, Prith
Author_Institution :
Dept. of Electr. & Comput. Eng., Northwestern Univ., Evanston, IL, USA
fYear :
2005
fDate :
3-7 Jan. 2005
Firstpage :
267
Lastpage :
273
Abstract :
This paper presents a power estimation and optimization approach in the early stage of behavioral synthesis for unscheduled data-dominated circuits. A methodology for estimating the power consumption of every module in the system is developed using an automatic construction of a novel switching table and the power table. An integer linear programming model is presented to reduce the energy consumption of the circuit through concurrent module selection, binding, and scheduling for a non-scheduled data path. Experimental results of six data-dominated benchmarks show that our technique achieves an average of 29.8% energy savings compared to a traditional area optimal synthesis algorithm where energy is not considered. Additionally, this approach consumes on the average 24.0% and 20.3% less energy compared to two other power-oriented optimization strategies respectively.
Keywords :
circuit optimisation; high level synthesis; integer programming; integrated circuit design; linear programming; low-power electronics; behavioral synthesis; data-dominated circuits; integer linear programming model; module binding; module scheduling; module selection; power consumption; power estimation; power table; switching table; Circuit synthesis; Design optimization; Energy consumption; Flow graphs; Hardware; High level languages; Integer linear programming; Modular construction; Power system modeling; Signal synthesis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2005. 18th International Conference on
ISSN :
1063-9667
Print_ISBN :
0-7695-2264-5
Type :
conf
DOI :
10.1109/ICVD.2005.62
Filename :
1383287
Link To Document :
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