DocumentCode :
2368263
Title :
Do we expect ESD failures in an EPA designed according to international standards? The need for a process related risk analysis
Author :
Gaertner, Reinhold
Author_Institution :
Infineon Technol., Munich
fYear :
2007
fDate :
16-21 Sept. 2007
Abstract :
ESD failures can occur in ESD protected areas that are designed according to the latest ESD standards like ANSI S20.20 or IEC 61340-5-1. The root cause for the failures can normally only be found by a detailed analysis of the whole production flow. This paper shows what hazards for ESD damages can occur in a typical process flow of a typical PCB manufacturing line, how the risk is going to be analyzed, and how it can be minimized. This method will be explained with some examples from the field.
Keywords :
ANSI standards; IEC standards; electrostatic discharge; failure analysis; printed circuit manufacture; risk analysis; ANSI S20.20; EPA; ESD failures; IEC 61340-5-1; PCB manufacturing line; process related risk analysis; production flow; ANSI standards; Electrostatic discharge; Failure analysis; Flow production systems; Hazards; IEC standards; Manufacturing processes; Protection; Pulp manufacturing; Risk analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
29th Electrical Overstress/Electrostatic Discharge Symposium, 2007. EOS/ESD
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-58537-136-5
Type :
conf
DOI :
10.1109/EOSESD.2007.4401751
Filename :
4401751
Link To Document :
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