Crosstalk noise analysis at multiple frequencies

In SOC designs, it is common to have multiple clocks with some of them capable of operating at different frequencies. Crosstalk noise analysis uses switching information of nets in the form of timing windows to identify simultaneously switching aggressors. When clock frequencies change, the switching overlap relationship among nets also changes. Hence it is important to perform crosstalk analysis at all frequencies at which the chip may operate. In this paper we propose an approach to perform crosstalk analysis across multiple frequencies concurrently. We first present a method to obtain the worst crosstalk noise across all frequencies for each stage. Then we consider glitch propagation effects and build an efficient approach to analyze for crosstalk failures at all frequencies. We also discuss a method to guarantee functionality for a range of frequencies.