DocumentCode :
2368609
Title :
An integrated TCAD system for VLSI reliability simulation
Author :
Park, Jin-Kyu ; Park, Tae-Soo ; Lee, Sang-Hoon ; Choi, Chang-Hoon ; Kim, Kyung-Ho
Author_Institution :
CAE, Samsung Electron. Co. Ltd., Kyungki, South Korea
fYear :
1996
fDate :
2-4 Sept. 1996
Firstpage :
151
Lastpage :
152
Abstract :
SANTA is a useful environment to both VLSI technology developer and circuit designers who are not familiar with complex TCAD tools. Through the ESD protection application, we find that a well selected device width and length can reduce process steps without loosing performance threshold.
Keywords :
VLSI; circuit CAD; electrostatic discharge; integrated circuit design; integrated circuit reliability; ESD protection; SANTA; VLSI reliability simulation; integrated TCAD system; Biological system modeling; Circuit simulation; Computational modeling; Electrostatic discharge; Fingers; Libraries; MOSFETs; Plugs; Protection; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Simulation of Semiconductor Processes and Devices, 1996. SISPAD 96. 1996 International Conference on
Print_ISBN :
0-7803-2745-4
Type :
conf
DOI :
10.1109/SISPAD.1996.865316
Filename :
865316
Link To Document :
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