DocumentCode
2368776
Title
Advanced geometric techniques in 3D process simulation
Author
Golias, Nikoluos A. ; Dutton, R.W.
Author_Institution
Stanford Univ., CA, USA
fYear
1996
fDate
2-4 Sept. 1996
Firstpage
169
Lastpage
170
Abstract
The modeling of semiconductor devices in the deep submicron era is a complicated and challenging procedure. Due to continuous scaling of IC structures many physical effects pose requirements for a full 3D simulation. The incorporation of advanced computational geometry techniques is imperative in the realization of such 3D process simulation tools. The simulation of a virtual factory, with the various processing steps (ion implantation, diffusion, oxidation, etching and deposition) directly modeled on a 3D tetrahedral grid presents many advantages, such as the direct geometry extraction for subsequent interconnect analysis and device simulation. Advanced geometric techniques for the realization of a virtual IC fabrication simulator directly on a 3D tetrahedral grid are presented. A highly efficient algorithm for refining unstructured tetrahedral meshes, having an O(n) computational complexity which generate very high quality elements, is used as the main tool for adaptive mesh generation. Techniques for the automatic grid formation based on the mask layout and processing information and deposition of material layers are also presented.
Keywords
ULSI; computational complexity; computational geometry; integrated circuit modelling; masks; mesh generation; semiconductor process modelling; 3D process simulation; 3D tetrahedral grid; IC structures; adaptive mesh generation; automatic grid formation; computational complexity; computational geometry techniques; continuous scaling; deep submicron era; direct geometry extraction; geometric techniques; mask layout; unstructured tetrahedral meshes; virtual factory; Analytical models; Computational geometry; Computational modeling; Etching; Ion implantation; Mesh generation; Oxidation; Semiconductor devices; Solid modeling; Virtual manufacturing;
fLanguage
English
Publisher
ieee
Conference_Titel
Simulation of Semiconductor Processes and Devices, 1996. SISPAD 96. 1996 International Conference on
Print_ISBN
0-7803-2745-4
Type
conf
DOI
10.1109/SISPAD.1996.865323
Filename
865323
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