DocumentCode :
2368945
Title :
Low Gate Charge 20V Class Trench-aligning Lateral Power MOSFET
Author :
Matsunaga, S. ; Sawada, M. ; Sugi, A. ; Takagiwa, K. ; Fujishima, N.
Author_Institution :
Device Technol. Lab., Fuji Electr. Adv. Technol., Ltd., Nagano
fYear :
2006
fDate :
4-8 June 2006
Firstpage :
1
Lastpage :
4
Abstract :
A low gate charge high-side N-channel trench lateral power MOSFET (TLPM) is developed. Using trench self-aligning structure, a short gate length and minimum gate-drain overlap are realized, and low gate charge is achieved. The product of on-resistance and gate charge Ron*Qg of 61mOmega*nC (Ron*Qgd of 16.4 mOmega*nC) is the lowest for 20V class integrated device. Thanks to the deep junction depth of N drift region, TLPM has good electrostatic discharge (ESD) tolerance, which is a weak point of conventional lightly doped drain (LDD) MOS. TLPM withstands 2kV pulse test at human body model (HBM) and 200V pulse tests at machine model (MM)
Keywords :
electrostatic discharge; power MOSFET; semiconductor device models; semiconductor device testing; 20 V; 200 V; N-channel MOSFET; electrostatic discharge; human body model; lightly doped drain MOS; trench self-aligning structure; trench-aligning lateral power MOSFET; Biological system modeling; Capacitance; Electrostatic discharge; Etching; Immune system; Laboratories; MOSFET circuits; Power MOSFET; Testing; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Semiconductor Devices and IC's, 2006. ISPSD 2006. IEEE International Symposium on
Conference_Location :
Naples
Print_ISBN :
0-7803-9714-2
Type :
conf
DOI :
10.1109/ISPSD.2006.1666138
Filename :
1666138
Link To Document :
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