• DocumentCode
    2369088
  • Title

    Time-interleaved incremental data converters with low oversampling ratios

  • Author

    Caldwell, Trevor C. ; Johns, David A.

  • Author_Institution
    Univ. of Toronto, Toronto
  • fYear
    2007
  • fDate
    2-5 July 2007
  • Firstpage
    9
  • Lastpage
    12
  • Abstract
    Incremental ADCs can operate at lower oversampling ratios than DeltaSigma modulators, resulting in higher input signal bandwidths. In this paper it is shown that time-interleaving can further increase the input signal bandwidth in incremental ADCs to the point that the oversampling ratio is equal to the time-interleaving factor, resulting in no decrease in the allowable input signal bandwidth due to oversampling. This paper investigates some of the advantages and challenges that time-interleaved incremental ADCs offer, and presents an example where a time-interleaved by 4 incremental ADC with an oversampling ratio of 4 can attain a resolution of 12 bits.
  • Keywords
    analogue-digital conversion; network synthesis; signal sampling; incremental ADC; oversampling ratios; signal bandwidth; time-interleaved incremental data converters design; time-interleaving factor; Attenuation; Bandwidth; Computer architecture; Delta modulation; Filters; Frequency; Image sampling; Multiplexing; Sampling methods; Signal resolution;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Research in Microelectronics and Electronics Conference, 2007. PRIME 2007. Ph.D.
  • Conference_Location
    Bordeaux
  • Print_ISBN
    978-1-4244-1000-2
  • Electronic_ISBN
    978-1-4244-1001-9
  • Type

    conf

  • DOI
    10.1109/RME.2007.4401798
  • Filename
    4401798