A fifth-order continuous-time sigma-delta modulator with 62-dB dynamic range and 2MHz bandwidth

Author

Wu, Rong ; Long, John R. ; van de Gevel, M. ; Glassche, Gerard

Author_Institution

Delft Univ. of Technol., Delft

fYear

2007

fDate

2-5 July 2007

Firstpage

17

Lastpage

20

Abstract

This paper presents a single-bit fifth-order continuous-time sigma-delta modulator for UMTS application. To relax the linearity requirement of the first integrator, a low-pass filter is inserted in the negative feedback loop after the summing node. To reduce power consumption, the loop- filter is implemented using a feed-forward topology. Measurement results show that it achieves 62 dB SNDR with an over-sampling ratio of 32 over a 2 MHz bandwidth. The power consumption is 8 mW at a supply voltage of 2.5 V in a 1-poly 5- metal 0.24 mum CMOS technology.

Keywords

3G mobile communication; CMOS integrated circuits; circuit feedback; continuous time systems; low-pass filters; radiofrequency integrated circuits; sigma-delta modulation; signal sampling; timing jitter; CMOS technology; UMTS application; analog-to-digital converter; bandwidth 2 MHz; clock jitter; continuous-time ADC; feed-forward topology; fifth-order continuous-time sigma-delta modulator; integrator; low-pass filter; negative feedback loop; over-sampling ratio; power 8 mW; power consumption reduction; size 0.24 mum; summing node; voltage 2.5 V; 3G mobile communication; Bandwidth; CMOS technology; Delta-sigma modulation; Dynamic range; Energy consumption; Feedforward systems; Linearity; Low pass filters; Negative feedback loops; Analog-to-digital converter; clock jitter; continuous-time ADC; feed-forward topology; sigma-delta converter;

fLanguage

English

Publisher

ieee

Conference_Titel

Research in Microelectronics and Electronics Conference, 2007. PRIME 2007. Ph.D.

Conference_Location

Bordeaux

Print_ISBN

978-1-4244-1000-2

Electronic_ISBN

978-1-4244-1001-9

Type

conf

DOI

10.1109/RME.2007.4401800

Filename

4401800