A novel algorithm for testing crosstalk induced delay faults in VLSI circuits

Crosstalk between adjacent lines can significantly affect the propagation delay of signals in deep-submicron (DSM) circuits. When such a circuit is subjected to conventional delay testing techniques, the critical paths obtained from static timing analysis are often incorrect due to the effect of crosstalk. Any path can have many wires (victims) which are affected by crosstalk from many other lines (aggressors). It may so happen that all the wires lying along a path are affected by crosstalk and the cumulative effect of crosstalk delays of all these victim nodes causes a timing violation. In such a case, all the aggressors associated with the victims lying along the path need to be activated appropriately in order to maximize the crosstalk delay, so that a delay fault, if it exists, is detected. In this paper we present a new automatic test pattern generation (ATPG) algorithm which maximizes the influence of crosstalk by appropriately activating the aggressors coupled to the victim nodes lying along any critical path.