• DocumentCode
    2369196
  • Title

    An ultra-fast, on-chip BiST for RF low noise amplifiers

  • Author

    Gopalan, Anand ; Das, Tejasvi ; Washburn, Clyde ; Mukund, P.R.

  • Author_Institution
    Dept. of Electr. Eng., Rochester Inst. of Technol., NY, USA
  • fYear
    2005
  • fDate
    3-7 Jan. 2005
  • Firstpage
    485
  • Lastpage
    490
  • Abstract
    This paper presents an ultra-fast built in self test (BiST) approach for RF low noise amplifiers. The technique uses test inputs of moderate precision and low overhead base-band circuitry to quantify various functional specifications in the LNA such as input/output match, power gain and linearity. The total self-test time for all these parameters is 15μs, which is several orders of magnitude improvement over existing test techniques. The BiST circuitry described presents low real estate and power overheads and does not require the presence of DSP cores to achieve self-test. The technique has been demonstrated for a 1.9GHz cascode LNA designed in the 0.25 micron IBM 6RF process.
  • Keywords
    built-in self test; integrated circuit testing; radiofrequency amplifiers; radiofrequency integrated circuits; 0.25 micron; 1.9 GHz; DSP cores; IBM 6RF process; RF low noise amplifiers; built in self test; functional specifications; self test time; Automatic testing; Built-in self-test; Circuit noise; Circuit testing; Digital signal processing; Impedance matching; Linearity; Low-noise amplifiers; Radio frequency; Radiofrequency amplifiers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 2005. 18th International Conference on
  • ISSN
    1063-9667
  • Print_ISBN
    0-7695-2264-5
  • Type

    conf

  • DOI
    10.1109/ICVD.2005.52
  • Filename
    1383322