DocumentCode :
2369703
Title :
A 600MHz VLIW DSP
Author :
Agarwala, S. ; Koeppen, P. ; Anderson, T. ; Hill, A. ; Ales, M. ; Damodaran, R. ; Nardini, L. ; Wiley, P. ; Mullinnix, S. ; Leach, J. ; Lell, A. ; Gill, M. ; Golston, J. ; Hoyle, D. ; Rajagopal, A. ; Chachad, A. ; Agarwala, M. ; Castille, R. ; Common, N.
Author_Institution :
Texas Instruments Inc.
Volume :
2
fYear :
2002
fDate :
7-7 Feb. 2002
Firstpage :
38
Lastpage :
390
Keywords :
Buffer storage; Clocks; Digital signal processing; Digital signal processing chips; Frequency; Pipeline processing; Random access memory; Registers; Size control; VLIW;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7335-9
Type :
conf
DOI :
10.1109/ISSCC.2002.992098
Filename :
992098
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2369703
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