• DocumentCode
    2369886
  • Title

    Ge MOSFETs performance: Impact of Ge interface passivation

  • Author

    Lee, C.H. ; Nishimura, T. ; Tabata, T. ; Wang, S.K. ; Nagashio, K. ; Kita, K. ; Toriumi, A.

  • Author_Institution
    Dept. of Mater. Eng., Univ. of Tokyo, Tokyo, Japan
  • fYear
    2010
  • fDate
    6-8 Dec. 2010
  • Abstract
    We have systematically investigated Ge interface passivation methods, and the highest electron (1920 cm2/Vs) and hole mobility (725 cm2/Vs) have been demonstrated by dramatic reduction of Dit through the collaboration of self-passivation and valency passivation. In Si passivation, it is found that Si contributes to the upper half (worse) and lower one (better) in the bandgap differently. This study strongly suggests us that high performance Ge CMOS is really feasible.
  • Keywords
    CMOS integrated circuits; MOSFET; electron mobility; elemental semiconductors; germanium; passivation; silicon; Ge; MOSFET; Si; electron mobility; hole mobility; interface passivation method; self-passivation; valency passivation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting (IEDM), 2010 IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0163-1918
  • Print_ISBN
    978-1-4424-7418-5
  • Electronic_ISBN
    0163-1918
  • Type

    conf

  • DOI
    10.1109/IEDM.2010.5703384
  • Filename
    5703384