DocumentCode :
2371322
Title :
A 5Gb/s 0.25/spl mu/m CMOS jitter-tolerant variable-interval oversampling clock/data recovery circuit
Author :
Sang-Hyun Lee ; Moon-Sang Hwang ; Youngdon Choi ; Sungioon Kim ; Yongsam Moon ; Bong-Joon Lee ; Deog-Kyoon Jeong ; Wonchan Kim ; Young June Park ; Gi-Jung Ahn
Author_Institution :
Seoul National University
Volume :
2
fYear :
2002
fDate :
7-7 Feb. 2002
Firstpage :
206
Lastpage :
474
Keywords :
Circuits; Clocks; Delay; Jitter; Moon; Robustness; Silicon; Tracking loops; Voltage; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7335-9
Type :
conf
DOI :
10.1109/ISSCC.2002.992216
Filename :
992216
Link To Document :
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