Gate-level design diagnosis using a learning-based search strategy

We propose a procedure for performing design error diagnosis at the gate level. The procedure is applicable to circuits having size parameters. It is based on the search strategy INCREDYBLE introduced before. The unique features of this procedure are that its performance does not deteriorate with circuit size, and that it is able to correct large numbers of errors present in the circuit at the same time. We demonstrate the procedure and provide experimental evidence of its effectiveness