Title :
Efficient techniques for multiple fault test generation
Author :
Kajihara, Seiji ; Nishigaya, Rikiya ; Sumioka, Tetsuji ; Kinoshita, Kozo
Author_Institution :
Dept. of Appl. Phys., Osaka Univ., Japan
Abstract :
This paper presents techniques used in combinational test generation for multiple stuck-at faults using the parallel vector pair analysis. The techniques accelerate test generation and reduce the number of test vectors generated, while higher fault coverage is derived. Experimental result for benchmark circuits shows the effectiveness of using the techniques
Keywords :
automatic testing; combinational circuits; fault diagnosis; fault location; logic testing; performance evaluation; benchmark circuits; combinational test generation; effectiveness; multiple fault test generation; multiple stuck-at faults; parallel vector pair analysis; test generation acceleration; test vectors; vector pair analysis; Benchmark testing; Circuit analysis; Circuit faults; Circuit testing; Combinational circuits; Electrical fault detection; Fault detection; Fault diagnosis; Life estimation; Physics;
Conference_Titel :
Test Symposium, 1994., Proceedings of the Third Asian
Conference_Location :
Nara
Print_ISBN :
0-8186-6690-0
DOI :
10.1109/ATS.1994.367254
