Title :
Fault coverage analysis in monitored sequential circuits
Author :
Parekhji, R.A. ; Venkatesh, G. ; Sherlekar, S.D.
Author_Institution :
Dept. of Comput. Sci. & Eng., Inst. of Technol., Bombay, India
Abstract :
This paper discusses the fault detection capabilities of monitored synchronous sequential circuits. Here a monitoring machine operates in lock-step with the main machine. This approach has two desirable features for fault detection. Besides the monitoring machine being less costly than the main machine, it is also not identical to it. It is shown that these features result in an improved fault coverage, of simultaneous delay faults affecting both the machines, as compared to duplication. At the same time, the hardware cost of the monitored sequential circuit is significantly lower
Keywords :
automatic testing; built-in self test; error detection; fault diagnosis; finite state machines; logic design; logic testing; sequential circuits; FSM synthesis; error detection; fault coverage; fault coverage analysis; fault detection; fault detection.; finite state machines; lock-step; monitored sequential circuits; monitoring machine; state assignment; synchronous sequential circuits; Circuit faults; Circuit testing; Computerized monitoring; Condition monitoring; Costs; Delay; Electrical fault detection; Fault detection; Hardware; Sequential circuits;
Conference_Titel :
Test Symposium, 1994., Proceedings of the Third Asian
Conference_Location :
Nara
Print_ISBN :
0-8186-6690-0
DOI :
10.1109/ATS.1994.367257
