Title :
A dual-issue floating-point coprocessor with SIMD architecture and fast 3D functions
Author :
Rogenmoser, R. ; O´Donnell, L. ; Nishimoto, S.
Author_Institution :
Broadcom
Keywords :
Adders; Central Processing Unit; Circuits; Clocks; Coprocessors; Decoding; Delay; MOS devices; Read only memory; Registers;
Conference_Titel :
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7335-9
DOI :
10.1109/ISSCC.2002.992283
