A Miniature Stacked Spiral Inductor Utilizing a Proposed Taper Structure for RFIC Size Reduction

Author

Park, Sang-Gyu ; Lee, Kwang-Du ; Kim, Yusin

Author_Institution

Central R&D Inst., Wireless Solutions Lab., Samsung Electro-Mech. Co., Ltd., Suwon

fYear

2008

fDate

27-31 Oct. 2008

Firstpage

622

Lastpage

625

Abstract

A miniature CMOS monolithic stacked spiral inductors were implemented by using a standard 0.13 mum one-poly-eight-metal (1P8M) Radio Frequency (RF) CMOS technology. The proposed taper geometry for enhanced quality factor (Q-factor) and the stacking technique for size reduction were employed. According to the measurement results, the proposed inductors are only 8% size occupation of the conventional standard inductor with the same inductance and their Q is about 50% higher than the conventional stacked inductor. In addition, a 6-GHz CMOS RF amplifier using the proposed inductors has been demonstrated to justify feasibility of utilizing for radio frequency integrated circuits (RFICs).

Keywords

CMOS integrated circuits; field effect MMIC; inductors; radiofrequency integrated circuits; CMOS RF amplifier; CMOS monolithic stacked spiral inductors; RFIC size reduction; frequency 6 GHz; miniature stacked spiral inductor; one-poly-eight-metal radio frequency CMOS; size 0.13 mum; taper structure; CMOS technology; Geometry; Inductance measurement; Inductors; Q factor; Q measurement; Radio frequency; Radiofrequency integrated circuits; Spirals; Stacking;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Conference, 2008. EuMC 2008. 38th European

Conference_Location

Amsterdam

Print_ISBN

978-2-87487-006-4

Type

conf

DOI

10.1109/EUMC.2008.4751529

Filename

4751529