Title :
Process variations and their impact on circuit operation
Author :
Natarajan, Suriyaprakash ; Breuer, Melvin A. ; Gupta, Sandeep K.
Author_Institution :
Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
Abstract :
The statistical variations in electrical parameters, such as transistor gain factors and interconnect resistances, due to variations in the manufacturing process are studied using data obtained from a 0.8 μm CMOS process. The impact of these variations and correlations on circuit operation is illustrated. Examples show that circuit delay can increase from the mean by about 100% due to crosstalk effects aggravated by process variations. Case studies emphasize the need for a tighter coupling between fabrication and circuit design and the need for new design corners based on process information
Keywords :
CMOS integrated circuits; VLSI; crosstalk; delays; integrated circuit design; integrated circuit interconnections; statistical analysis; 0.8 micron; CMOS process; circuit delay; circuit operation; crosstalk effects; design corners; electrical parameters; interconnect resistances; manufacturing process; process variations; statistical variations; transistor gain factors; Capacitance; Circuit optimization; Crosstalk; Delay; Electrical resistance measurement; Fabrication; Integrated circuit interconnections; Manufacturing processes; Testing; Threshold voltage;
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 1998. Proceedings., 1998 IEEE International Symposium on
Conference_Location :
Austin, TX
Print_ISBN :
0-8186-8832-7
DOI :
10.1109/DFTVS.1998.732153
