A silicon compiler for fault-tolerant ROMs

This paper describes a new CAD tool, FTROM-Fault-Tolerant ROM-compiler, for synthesizing fault-tolerant ROM modules with flexible, user-specified geometry and CMOS design-rule parameters. It employs a novel fault-tolerant design approach that produces negligible access delay penalty and silicon area overhead. FTROM reduces the design turnaround time and the BIST and BISR circuitry incorporated eliminate the high cost of external testing of commodity ROMs. Such circuits are also very useful for on-chip ROM macrocells used in high-density microprocessors and ASICs, since the I/O pins of such macrocells are extremely difficult to control and observe