DocumentCode :
2375664
Title :
19.2mW 2Gbps CMOS pulse receiver for 60GHz band wireless communication
Author :
Oncu, Ahmet ; Fujishima, Minoru
Author_Institution :
Sch. of Frontier Sci., Univ. of Tokyo, Kashiwa
fYear :
2008
fDate :
18-20 June 2008
Firstpage :
158
Lastpage :
159
Abstract :
A low-power 60 GHz pulse receiver has been fabricated for over-Gbps wireless communication by a standard 90 nm CMOS process. The receiver consists of a nonlinear detecting amplifier, a limiting amplifier, an offset canceller and a buffer. The measured sensitivity is the average power of -20 dBm for millimeter-wave pulses of 60 GHz. The power dissipation and maximum data rate of the receiver are 19.2 mW and 2 Gbps, respectively. These results indicate the possibility of new low-power and ultrahigh-speed wireless communication using millimeter-wave pulses with CMOS implementation.
Keywords :
CMOS integrated circuits; amplifiers; buffer circuits; receivers; CMOS; buffer; limiting amplifier; nonlinear detecting amplifier; offset canceller; pulse receiver; wireless communication; Bit error rate; CMOS process; Millimeter wave communication; Millimeter wave measurements; Optical amplifiers; Optical pulses; Optical receivers; Pulse amplifiers; Pulse measurements; Wireless communication; 60GHz; CMOS; low power; pulse receiver;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 2008 IEEE Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-1804-6
Electronic_ISBN :
978-1-4244-1805-3
Type :
conf
DOI :
10.1109/VLSIC.2008.4585989
Filename :
4585989
Link To Document :
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