Resistively-Terminated Via-Stubs for Signal Integrity Improvement in the Semiconductor Test Board

In this paper, a resistive termination of via-stubs is proposed for the improvements of signal integrity (SI) in the multi-layered semiconductor test board. In current semiconductor test boards, as the resonance mode excited by the open via-stub, unused portion of plated through holes (PTH) results in SI degradation. Resistively-terminated via-stubs improve SI by reducing the via-stub effect causing the rounded digital pulse edge in time domain. The proposed structure achieves the shortened transition time (Tr/Tf) and enhanced timing jitter. It is expected to extend the maximum practicable data rate of the semiconductor test board with the proposed structure.