DocumentCode
2378072
Title
Improved digital I/O ports enhance testability of interconnections
Author
Kristof, Adam
Author_Institution
Silesian Tech. Univ., Gliwice, Poland
fYear
2002
fDate
2002
Firstpage
763
Lastpage
772
Abstract
In this paper improved I/O ports for digital integrated circuits are presented. These new I/O ports have controllable electrical properties and built-in overload detectors. The first feature ensures a desirable interconnection fault model during testing. The built-in overload detectors enable short circuits and overloads to be detected on-line. An example design, cost estimation and experimental results are described.
Keywords
digital integrated circuits; fault location; integrated circuit design; integrated circuit interconnections; integrated circuit modelling; integrated circuit testing; I/O port design; built-in overload detectors; controllable electrical properties; cost estimation; digital I/O ports; digital integrated circuits; interconnection fault model; interconnection testability; interconnection testing; overload on-line detection; short circuit on-line detection; Circuit faults; Circuit testing; Costs; Detectors; Digital integrated circuits; Electrical fault detection; Electronic equipment testing; Fault detection; Integrated circuit interconnections; Integrated circuit testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2002. Proceedings. International
ISSN
1089-3539
Print_ISBN
0-7803-7542-4
Type
conf
DOI
10.1109/TEST.2002.1041829
Filename
1041829
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