Fast Thermal Aware Placement With Accurate Thermal Analysis Based on Green Function

Author

Liu, Sean S.-Y ; Ren-Guo Luo ; Aroonsantidecha, Suradeth ; Ching-Yu Chin ; Hung-Ming Chen

Author_Institution

Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan

Volume

22

Issue

6

fYear

2014

fDate

Jun-14

Firstpage

1404

Lastpage

1415

Abstract

In this paper, we present a fast and accurate thermal aware analytical placer. A thermal model is constructed based on a Green function with discrete cosine transform (DCT) to generate full chip temperature profile. Our thermal model is tightly integrated with an analytical placer implemented based on the SimPL framework. A temperature spreading force based on the Gaussian model is proposed to reduce the maximum on-chip temperature and optimize tradeoff between total half-perimeter wirelength and on-chip maximum temperature. The temperature profile generated using our thermal model is verified by the ANSYS ICEPAK and obtains an average deviation within 3.0% with 240× speedup.

Keywords

Green´s function methods; discrete cosine transforms; electronic design automation; integrated circuit design; integrated circuit reliability; semiconductor device reliability; thermal analysis; ANSYS ICEPAK; DCT; Gaussian model; Green function; SimPL framework; discrete cosine transform; full chip temperature profile; half-perimeter wirelength; on-chip maximum temperature; thermal analysis; thermal aware placement; thermal model; Design for manufacture; design for quality; design methodology; electronic design automation; logic design; placement; temperature control; thermal analysis; thermal analysis.;

fLanguage

English

Journal_Title

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on

Publisher

ieee

ISSN

1063-8210

Type

jour

DOI

10.1109/TVLSI.2013.2268582

Filename

6553166