DocumentCode
2379536
Title
Digital filter synthesis considering multiple adder graphs for a coefficient
Author
Han, Jeong-Ho ; Park, In-Cheol
Author_Institution
Sch. of EECS, Korea Adv. Inst. of Sci. & Technol., Daejeon
fYear
2008
fDate
12-15 Oct. 2008
Firstpage
315
Lastpage
320
Abstract
In this paper, a new FIR digital filter synthesis algorithm is proposed to consider multiple adder graphs for a coefficient. The proposed algorithm selects an adder graph that can be maximally sharable with the remaining coefficients, while previous dependence-graph algorithms consider only one adder graph when implementing a coefficient. In addition, we propose an addition reordering technique to reduce the computational overhead of finding multiple adder graphs. By using the proposed technique, multiple adder graphs are efficiently generated from a seed adder graph obtained by using previous dependence-graph algorithms. Experimental results show that the proposed algorithm reduces the hardware cost of FIR filters by 23% and 3.4% on average compared to the Hartely and RAGn-hybrid algorithms.
Keywords
FIR filters; adders; computational complexity; graph theory; FIR digital filter synthesis; addition reordering technique; computational complexity; dependence-graph algorithm; multiple adder graph; seed adder graph; Adders; Costs; Delay; Digital filters; Energy consumption; Finite impulse response filter; Hardware; Logic; Signal processing algorithms; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design, 2008. ICCD 2008. IEEE International Conference on
Conference_Location
Lake Tahoe, CA
ISSN
1063-6404
Print_ISBN
978-1-4244-2657-7
Electronic_ISBN
1063-6404
Type
conf
DOI
10.1109/ICCD.2008.4751879
Filename
4751879
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