On-die DFT based solutions are sufficient for testing multi-GHz interfaces in manufacturing (and are also key to enabling lower cost ATE platforms)

Author

Tripp, Mike

fYear

2002

fDate

2002

Firstpage

1232

Abstract

Based on experiences with 500 MHz to 1 GHz interfaces on high volume CPU and chipset products, it is evident that on-die DFT based solutions are sufficient to screen defects in manufacturing. On-die DFT and test methods can very accurately determine differences in performance (drive, timing, leakage, jitter,...) between the various interface channels on a single device, and the magnitude of the difference can be used as indication of defective channels.

Keywords

automatic test equipment; computer interfaces; design for testability; driver circuits; fault location; integrated circuit testing; jitter; leakage currents; logic testing; microprocessor chips; timing; very high speed integrated circuits; 500 MHz to 1 GHz; chipset products; defect screening; defective channel detection; drive circuits; high volume CPU manufacture; interface channels; jitter; leakage; low-cost ATE platforms; multi-GHz interface on-die DFT test solutions; on-die test methods; performance difference determination; timing; Assembly; Atherosclerosis; Costs; Fabrication; Manufacturing; Probability distribution; Robustness; Silicon; Testing; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 2002. Proceedings. International

ISSN

1089-3539

Print_ISBN

0-7803-7542-4

Type

conf

DOI

10.1109/TEST.2002.1041933

Filename

1041933