• DocumentCode
    2380041
  • Title

    Estimating design time for system circuits

  • Author

    Bazeghi, Cyrus ; Mesa-Martínez, Francisco J. ; Greskamp, Brian ; Torrellas, Josep ; Renau, Jose

  • Author_Institution
    Dept. of Computer Engineering, University of California Santa Cruz, USA
  • fYear
    2007
  • fDate
    15-17 Oct. 2007
  • Firstpage
    60
  • Lastpage
    65
  • Abstract
    System design complexity is growing rapidly. As a result, current development costs are constantly increasing. It is becoming increasingly difficult to estimate how much time it will take to design and verify these designs, which are getting denser and increasingly more complex. To compound this problem, circuit design cost estimation still does not have a quantitative approach. Although designing a system is very resource consuming, there is little work invested in measuring, understanding, and estimating the effort required. To address part of the current shortcomings, this paper introduces μPCBComplexity, a methodology to measure and estimate PCB (printed circuit board) design effort. PCBs are the central component of many systems and require large amounts of resources to properly design and verify. μPCBComplexity consists of two main parts; a procedure to account for the contributions of the different elements in the design, and a non-linear statistical regression of experimental measures in order to determine a good design effort metric. We use μPCBComplexity to evaluate a series of design effort estimators for twelve PCB designs. By using the proposed μPCBComplexity metric, designers can estimate PCB design effort.
  • Keywords
    Circuit synthesis; Computer science; Costs; Design engineering; Frequency estimation; Packaging; Printed circuits; Signal design; Statistical analysis; Statistics;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Very Large Scale Integration, 2007. VLSI - SoC 2007. IFIP International Conference on
  • Conference_Location
    Atlanta, GA, USA
  • Print_ISBN
    978-1-4244-1710-0
  • Electronic_ISBN
    978-1-4244-1710-0
  • Type

    conf

  • DOI
    10.1109/VLSISOC.2007.4402473
  • Filename
    4402473