Accelerated life time tests of laser formed vertical links of standard CMOS double level metallizations

Contact chains containing 30 to 37 links, alternated by probe pads, were investigated. Test structures were fabricated with two different layer sequences. Laser antifuses are simple expanded interconnections. Current densities, scaled by first level interconnections (3 μm², resp. 3.6 μm²), were varied from 0.66×10⁶ A/cm² to 1×10⁶ A/cm², and substrate temperatures from 180°C to 270°C. The test procedure results in multiple censored data, which can be treated by application of hazard plots. Best results were obtained from 14×14 μm² expansions of sequence 1, connected by two Nd:YAG pulses. A conservative extrapolation of Black´s equation to 80°C/1 mA with E_A=0.4 eV, T=T_SUB , and n=-2 showed, that only for two sets of test parameters, a 10 FIT/layer was slightly below 10 years