Energy-delay tradeoffs in 32-bit static shifter designs

Author

Huntzicker, S. ; Dayringer, M. ; Soprano, Justin ; Weerasinghe, Anthony ; Harris, David Money ; Patil, Dinesh

Author_Institution

Harvey Mudd Coll., Claremont, CA

fYear

2008

fDate

12-15 Oct. 2008

Firstpage

626

Lastpage

632

Abstract

This paper compares the energy-delay tradeoff curves of 32-bit static barrel and funnel shifters. The Stanford Circuit Optimization Tool (SCOT) is used to determine best transistor sizes in a 90 nm process. The paper evaluates the effect of multiplexer valency, circuit design, and physical placement. It also quantifies the costs of various shift operations. A funnel shifter using 4- and 8-input static multiplexer stages gives the best energy-delay tradeoff, with a knee at 440 ps (15 FO4 inverter delays) consuming 0.9 pJ per shift.

Keywords

integrated circuit design; multiplexing equipment; optimisation; transistors; Stanford circuit optimization tool; barrel shifters; circuit design; energy-delay tradeoffs; funnel shifters; multiplexer valency; physical placement; static shifter designs; transistor sizes; Arithmetic; Circuit optimization; Circuit synthesis; Delay; Design optimization; Educational institutions; Inverters; Multiplexing; Signal design; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Design, 2008. ICCD 2008. IEEE International Conference on

Conference_Location

Lake Tahoe, CA

ISSN

1063-6404

Print_ISBN

978-1-4244-2657-7

Electronic_ISBN

1063-6404

Type

conf

DOI

10.1109/ICCD.2008.4751926

Filename

4751926