DocumentCode :
2380416
Title :
Improvement Effect of Electrical Properties in Post-Annealed Wafer-Bonded Ge(001)-OI Substrate
Author :
Yamasaka, Shuto ; Nakamura, Yoshiaki ; Yoshitake, Osamu ; Kikkawa, Jun ; Izunome, Koji ; Sakai, Akira
Author_Institution :
Grad. Sch. of Eng. Sci., Osaka Univ., Toyonaka, Japan
fYear :
2012
fDate :
4-6 June 2012
Firstpage :
1
Lastpage :
2
Abstract :
In this study, using pseudo-MOSFET, we investigate improvement effect of the electrical properties of non-doped wafer-bonded Ge(001)-OI by post-annealing in various kinds of ambiences.
Keywords :
MOSFET; annealing; electric properties; elemental semiconductors; germanium; Ge; electrical properties; improvement effect; post-annealing; pseudo-MOSFET; wafer-bonded germanium substrate; Annealing; Hysteresis; Silicon; Substrates; Threshold voltage; Transistors; Wafer bonding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Silicon-Germanium Technology and Device Meeting (ISTDM), 2012 International
Conference_Location :
Berkeley, CA
Print_ISBN :
978-1-4577-1864-9
Electronic_ISBN :
978-1-4577-1863-2
Type :
conf
DOI :
10.1109/ISTDM.2012.6222498
Filename :
6222498
Link To Document :
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