DocumentCode
2380451
Title
Qualification of behavioral level design validation for AMS & RF SoCs
Author
Joannon, Yves ; Beroulle, Vincent ; Robach, Chantal ; Tedjini, Smail ; Carbonero, Jean-Louis
Author_Institution
LCIS-ESISAR (INPG), Valence, France
fYear
2007
fDate
15-17 Oct. 2007
Firstpage
206
Lastpage
211
Abstract
The expansion of Wireless Systems-on-Chip leads to a rapid development of design and manufacturing methods In this paper, the test vectors used for design validation of AMS & RF SoCs are evaluated and optimized. This qualification is based on a fault injection method. A fault model based on variation of behavioral parameters and a related qualification metric are proposed. This approach is used in the receiver’s design of a WCDMA transceiver. A test set defined by verification engineers during the validation of this system is qualified and optimized. Then, this test set is compared with a second test set automatically generated by a developed tool.
Keywords
Automatic testing; Circuit faults; Circuit testing; Design methodology; Integrated circuit modeling; Multiaccess communication; Qualifications; Radio frequency; Radiofrequency integrated circuits; System testing; AMS & RF SoCs; Test Qualification; VHDL-AMS; behavioral modeling; characterization; design validation; fault injection;
fLanguage
English
Publisher
ieee
Conference_Titel
Very Large Scale Integration, 2007. VLSI - SoC 2007. IFIP International Conference on
Conference_Location
Atlanta, GA, USA
Print_ISBN
978-1-4244-1710-0
Electronic_ISBN
978-1-4244-1710-0
Type
conf
DOI
10.1109/VLSISOC.2007.4402499
Filename
4402499
Link To Document