DocumentCode
2380556
Title
Full custom design of a three-stage amplifier with 5500MHz·pF/mW Performance in 0.18 μm CMO S
Author
Chen, Run ; Liu, Liyuan ; Li, DongMei ; Wang, ZhiHua
Author_Institution
Institute of Microelectronics, China
fYear
2007
fDate
15-17 Oct. 2007
Firstpage
242
Lastpage
247
Abstract
A full custom design of a three-stage amplifier is described in this paper. A feedback transconductance stage and a feedforward stage combined with two Miller compensation capacitors are used for frequency compensation. The circuit is designed in 0.18μm CMOS process with a 1.8V supply voltage. When driving a 150pF capacitive load, the amplifier achieves over l00dB de gain, 2.24MHz gain- bandwidth product (GBW), 62° phase margin (PM), 1.2V/μs slew rate (SR) and 61μW power dissipation. Compared to conventional multistage amplifiers, this work provides improvement in both GBW and SR, and also shows a significant improvement in MHz·pF/mW performance.
Keywords
Bandwidth; CMOS process; Capacitors; Circuits; Feedback; Frequency; Power amplifiers; Strontium; Transconductance; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Very Large Scale Integration, 2007. VLSI - SoC 2007. IFIP International Conference on
Conference_Location
Atlanta, GA, USA
Print_ISBN
978-1-4244-1710-0
Electronic_ISBN
978-1-4244-1710-0
Type
conf
DOI
10.1109/VLSISOC.2007.4402505
Filename
4402505
Link To Document