DocumentCode
2380615
Title
Improvement of dual rail logic as a countermeasure against DPA
Author
Razafindraibe, A. ; Robert, M. ; Maurine, P.
Author_Institution
LIRMM/ CNRS/ University of Montpellier, 161 rue Ada, 34392 Montpellier Cedex 5 - France
fYear
2007
fDate
15-17 Oct. 2007
Firstpage
270
Lastpage
275
Abstract
Dual rail logic is considered as a relevant hardware countermeasure against Differential Power Analysis (DPA) by making power consumption data independent. In this paper, we deduce from a thorough analysis of the robustness of dual rail logic against DPA the design range in which it can be considered as effectively robust. Surprisingly this secure design range is quite narrow. We therefore propose the use of an improved logic, called Secure Triple Track Logic, as an alternative to more conventional dual rail logics. To validate the claimed benefits of the logic introduced herein, we have implemented a sensitive block of the Data Encryption Standard algorithm (DES) and carried out by simulation DPA attacks.
Keywords
Logic; Rails;
fLanguage
English
Publisher
ieee
Conference_Titel
Very Large Scale Integration, 2007. VLSI - SoC 2007. IFIP International Conference on
Conference_Location
Atlanta, GA, USA
Print_ISBN
978-1-4244-1710-0
Electronic_ISBN
978-1-4244-1710-0
Type
conf
DOI
10.1109/VLSISOC.2007.4402510
Filename
4402510
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