Influence of photoresist pattern on charging damage during high current ion implantation

Author

Dirnecker, T. ; Ruf, A. ; Frey, L. ; Beyer, A. ; Bauer, A.J. ; Henke, D. ; Ryssel, H.

Author_Institution

Device Technol. Div., Fraunhofer Inst. of Integrated Circuits, Erlangen, Germany

fYear

2002

fDate

2002

Firstpage

106

Lastpage

109

Abstract

The influence of photoresist pattern on charging damage of gate oxides during high current arsenic implantation is studied. Metal-oxide-semiconductor (MOS) capacitors of 10 μm² active area and 4.5 nm oxide thickness connected with various types of poly antennas and resist patterns on top were processed, whereby the resist overlapped and/or enclosed the gate electrode during ion implantation. The evaluation of the devices was performed by leakage current and charge to breakdown (Qbd) measurements. The influence of resist size, perimeter, and coverage of polyelectrodes is described in detail.

Keywords

MOS capacitors; arsenic; ion implantation; leakage currents; photoresists; semiconductor device breakdown; 4.5 nm; MOS capacitors; charge to breakdown measurements; charging damage; gate electrode; gate oxides; high current As implantation; high current ion implantation; ion implantation; leakage current; metal-oxide-semiconductor capacitors; photoresist pattern influence; poly antennas; polyelectrodes; resist patterns; resist size; Antenna measurements; Current measurement; Design for quality; Electric breakdown; Electrodes; Ion implantation; Leakage current; MOS capacitors; Performance evaluation; Resists;

fLanguage

English

Publisher

ieee

Conference_Titel

Plasma- and Process-Induced Damage, 2002 7th International Symposium on

Print_ISBN

0-9651577-7-6

Type

conf

DOI

10.1109/PPID.2002.1042620

Filename

1042620