• DocumentCode
    2380693
  • Title

    Implementing cellular automata modeled applications on network-on-chip platforms

  • Author

    Zompakis, N. ; Papadopoulos, L. ; Sirakoulis, G. ; Soudris, D.

  • Author_Institution
    VLSI Design and Testing Center, Department of Electrical and Computer Engineering, Democritus Univ. Thrace, 67100 Xanthi, Greece
  • fYear
    2007
  • fDate
    15-17 Oct. 2007
  • Firstpage
    288
  • Lastpage
    291
  • Abstract
    Nowadays, embedded consumer devices are expected to support demanding applications in terms of performance and energy consumption. For implementing such applications on Network- on-Chips (NoCs) a design methodology for performing exploration at system-level is needed, in order to select the optimal application-specific NoC architecture. In this paper we present a methodology for designing application-specific NoC platforms at system-level. The methodology is based on the exploration of different NoC aspects (e.g. topology, routing algorithms etc.) and is supported by a flexible NoC simulator. In this work we apply our methodology to applications modeled with Cellular Automata (CA).
  • Keywords
    Network-on-a-chip; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Very Large Scale Integration, 2007. VLSI - SoC 2007. IFIP International Conference on
  • Conference_Location
    Atlanta, GA, USA
  • Print_ISBN
    978-1-4244-1710-0
  • Electronic_ISBN
    978-1-4244-1710-0
  • Type

    conf

  • DOI
    10.1109/VLSISOC.2007.4402514
  • Filename
    4402514