DocumentCode :
2380710
Title :
An offset cancellation bit-line sensing scheme for low-voltage DRAM applications
Author :
Sang Hoon Hong ; Si Hong Kim ; Se Jun Kim ; Jae-Kyung Wee ; Jin Yong Chung
Author_Institution :
Hynix Semicond. Inc., Kyoung, South Korea
Volume :
1
fYear :
2002
fDate :
7-7 Feb. 2002
Firstpage :
154
Abstract :
Offset-cancellation provides low-voltage DRAM operation. The offset cancelling bit-line sense amplifiers are pitch-matched to the conventional 0.16 /spl mu/m DRAM cell array without process modifications. Results indicate better refresh characteristics than conventional bit-line sense amplifiers even at 1.5 V.
Keywords :
DRAM chips; integrated circuit measurement; low-power electronics; 0.16 micron; 1.5 V; bit-line sensing scheme; low-voltage DRAM applications; offset cancellation; pitch-matched amplifiers; refresh characteristics; Acoustical engineering; CMOS technology; Capacitance; Circuit noise; Circuit testing; Noise cancellation; Noise figure; Random access memory; Semiconductor device noise; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7335-9
Type :
conf
DOI :
10.1109/ISSCC.2002.992982
Filename :
992982
Link To Document :
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