Title :
A 6b 1.6 Gsample/s flash ADC in 0.18 /spl mu/m CMOS using averaging termination
Author :
Scholtens, P. ; Vertregt, M.
Author_Institution :
Philips Res. Labs., Eindhoven, Netherlands
Abstract :
A 1.6 Gsample/s 6b flash analog-to-digital converter in 0.18 /spl mu/m CMOS is for storage read channels. The array of amplifiers and averaging resistors is terminated with less overrange while maintaining full-scale linearity. Consuming 340 mW, it achieves 5.7 effective bits at DC and 5 effective bits at 660 MHz.
Keywords :
CMOS integrated circuits; amplifiers; analogue-digital conversion; integrated circuit design; integrated circuit testing; magnetic storage; optical storage; resistors; 0.18 micron; 340 mW; 6 bit; 660 MHz; CMOS flash ADC; amplifier array; averaging resistors; averaging termination; effective bits; flash analog-to-digital converter; full-scale linearity; magnetic data storage systems; optical data storage systems; overrange; storage read channels; Analog-digital conversion; CMOS technology; Capacitance; Circuits; High speed optical techniques; Laboratories; Linearity; Optical amplifiers; Resistors; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7335-9
DOI :
10.1109/ISSCC.2002.992989
