DocumentCode
2380893
Title
An on-chip 100 GHz-sampling rate 8-channel sampling oscilloscope with embedded sampling clock generator
Author
Takamiya, M. ; Mizuno, M. ; Nakamura, K.
Author_Institution
NEC Corp., Kanagawa, Japan
Volume
1
fYear
2002
fDate
7-7 Feb. 2002
Firstpage
182
Abstract
An on-chip 8-channel sampling oscilloscope macro for signal integrity checking uses a 0.13 /spl mu/m CMOS process. It contains a phase-interpolated sampling clock generator for 100GHz sampling, charge-sharing sampling heads, and ESD-tolerant decoupling capacitors for noise-immune measurement.
Keywords
CMOS integrated circuits; clocks; oscilloscopes; signal generators; signal processing equipment; 0.13 /spl mu/m CMOS; 0.13 micron; 100 GHz; 100 GHz sampling rate; 8-channel sampling oscilloscope macro; ESD tolerant decoupling capacitors; charge-sharing sampling; embedded sampling clock generator; measured calibration function; noise-immune measurement; oscilloscope output voltage; phase-interpolated sampling clock generator; signal integrity checking; CMOS process; Capacitors; Clocks; Current measurement; Noise generators; Oscilloscopes; Phase noise; Sampling methods; Signal processing; Signal sampling;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location
San Francisco, CA, USA
Print_ISBN
0-7803-7335-9
Type
conf
DOI
10.1109/ISSCC.2002.992996
Filename
992996
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