• DocumentCode
    2381708
  • Title

    Timing Analysis for TDMA Arbitration in Resource Sharing Systems

  • Author

    Schranzhofer, Andreas ; Chen, Jian-Jia ; Thiele, Lothar

  • Author_Institution
    Comput. Eng. & Networks Lab. (TIK), ETH Zurich, Zurich, Switzerland
  • fYear
    2010
  • fDate
    12-15 April 2010
  • Firstpage
    215
  • Lastpage
    224
  • Abstract
    Modern computing systems have adopted multicore architectures and multiprocessor systems on chip (MPSoCs) for accommodating the increasing demand on computation power. However, performance boosting is constrained by shared resources, such as buses, main memory, DMA, etc.This paper analyzes the worst-case completion (response) time for real-time tasks when time division multiple access (TDMA) policies are applied for resource arbitration.Real-time tasks execute periodically on a processing element and are constituted by sequential superblocks. A superblock is characterized by its accesses to a shared resource and its computation time. We explore three models of accessing shared resources: (1)dedicated access model, in which accesses happen only at the beginning and the end of a superblock, (2) general access model, in which accesses could happen anytime during the execution of a superblock, and (3) hybrid access model, which combines the dedicated and general access models. We present a framework to analyze the worst-case completion time of real-time tasks (superblocks) under these three access models, for a given TDMA arbiter. We compare the timing analysis of the three proposed models for a real-world application.
  • Keywords
    system-on-chip; time division multiple access; DMA; SOC; TDMA arbitration; buses; general access model; hybrid access model; main memory; multicore architectures; multiprocessor systems on chip; resource sharing systems; time division multiple access policies; timing analysis; worst-case completion time; Boosting; Computer architecture; Multicore processing; Multiprocessing systems; Performance analysis; Resource management; System-on-a-chip; Time division multiple access; Time factors; Timing; Real-Time Systems; Time Division Multiple Access (TDMA); Worst-Case Timing Analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Real-Time and Embedded Technology and Applications Symposium (RTAS), 2010 16th IEEE
  • Conference_Location
    Stockholm
  • ISSN
    1080-1812
  • Print_ISBN
    978-1-4244-6690-0
  • Electronic_ISBN
    1080-1812
  • Type

    conf

  • DOI
    10.1109/RTAS.2010.24
  • Filename
    5465981