• DocumentCode
    2382166
  • Title

    A 0.9 V to 1.95 V dynamic voltage-scalable and frequency-scalable 32 b PowerPC processor

  • Author

    Nowka, K. ; Carpenter, G. ; Mac Donald, E. ; Hung Ngo ; Brock, B. ; Ishii, K. ; Nguyen, T. ; Burns, J.

  • Author_Institution
    IBM Austin Res. Lab., TX, USA
  • Volume
    1
  • fYear
    2002
  • fDate
    7-7 Feb. 2002
  • Firstpage
    340
  • Abstract
    A 32 b PowerPC/spl trade/ system-on-a-chip supporting dynamic voltage supply and dynamic frequency scaling operates from 366 MHz at 1.8 V and 600 mW down to 150 MHz at 1.0 V and 53 mW in a 0.18 /spl mu/m CMOS process. Maximum supply change without PLL relock is 10 mV//spl mu/s. Processor state save/restore enables a deep-sleep state.
  • Keywords
    CMOS digital integrated circuits; VLSI; microprocessor chips; pipeline processing; 0.18 micron; 0.9 to 1.95 V; 150 to 366 MHz; 32 bit; 53 to 600 mW; CMOS process; PowerPC SoC; PowerPC processor; deep-sleep state; dynamic frequency-scalable processor; dynamic voltage-scalable processor; five-stage pipeline; processor state save/restore; system-on-a-chip; Batteries; Circuits; Clocks; Dynamic voltage scaling; Energy consumption; Energy efficiency; Frequency; Logic arrays; Low voltage; System-on-a-chip;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
  • Conference_Location
    San Francisco, CA, USA
  • Print_ISBN
    0-7803-7335-9
  • Type

    conf

  • DOI
    10.1109/ISSCC.2002.993071
  • Filename
    993071