DocumentCode :
2382728
Title :
A 34 word/spl times/64 b 10 R/6 W write-through self timed dual-supply-voltage register file
Author :
Tzartzanis, N. ; Walker, W.W. ; Nguyen, H. ; Inoue, A.
Author_Institution :
Fujitsu Labs. of America, Sunnyvale, CA, USA
Volume :
1
fYear :
2002
fDate :
7-7 Feb. 2002
Firstpage :
416
Abstract :
A register file leverages from a replica-based control unit to improve reliability, operate in a wide voltage range, and support two supply voltages. The main power supply can be stepped down to reduce power, or shut off for sleep mode. Access time is 1.4 ns and power dissipation is 220 mW at 500 MHz in 1.2 V, 0.11 /spl mu/m CMOS.
Keywords :
CMOS digital integrated circuits; digital signal processing chips; integrated circuit reliability; power supply circuits; shift registers; timing; 0.11 micron; 1.2 V; 1.4 ns; 220 mW; 500 MHz; 64 bit; CMOS technology; access time; main power supply stepping; operating voltage range; power dissipation; power reduction; register file; reliability; replica-based control unit; sleep mode; supply voltages; write-through self-timed dual-supply-voltage register file; Clocks; Decoding; Delay; Laboratories; Logic; Power supplies; Radio frequency; Timing; Voltage; Writing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7335-9
Type :
conf
DOI :
10.1109/ISSCC.2002.993109
Filename :
993109
Link To Document :
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