DocumentCode
2383187
Title
Diagnostic reasoning in digital systems
Author
Thearling, K.H. ; Iyer, R.K.
Author_Institution
Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
fYear
1988
fDate
27-30 June 1988
Firstpage
286
Lastpage
291
Abstract
The authors describe an efficient method for fault diagnosis in digital systems based on the technique of reasoning. The methodology operates on the observed erroneous behavior and the structure of the system. The behavior consists of the error(s) observed on the circuit´s output lines and specific values on the circuit´s input lines. The technique described improves on previously published research on diagnostic reasoning in two ways. Previous work has stressed system independent techniques which could be used to diagnose any fault system whose structure can be represented. By concentrating their efforts on the specific case of diagnosing faulty digital circuits, the authors have been able to simplify the representation of the structure of the system. This representation, in the form of an AND/OR fault tree, efficiently abstracts the structure of a faulty digital system. More importantly, a method for partitioning the digital system is introduced which is shown to reduce greatly the complexity of the diagnosis.<>
Keywords
digital systems; fault location; logic testing; AND/OR fault tree; diagnostic reasoning; digital systems; fault diagnosis; observed erroneous behavior; Circuit faults; Contracts; Digital circuits; Digital systems; Fault diagnosis; Fault trees; NASA;
fLanguage
English
Publisher
ieee
Conference_Titel
Fault-Tolerant Computing, 1988. FTCS-18, Digest of Papers., Eighteenth International Symposium on
Conference_Location
Tokyo, Japan
Print_ISBN
0-8186-0867-6
Type
conf
DOI
10.1109/FTCS.1988.5333
Filename
5333
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