• DocumentCode
    2383546
  • Title

    Device characteristics research according to the array EEPROM cell´s active pattern difference

  • Author

    Choi, Young-sik ; Roh, Yong-han ; Yi, Sang-bae ; Kim, Sun-hyun ; You, Sung-hoon

  • Author_Institution
    Syst. LSI Div., Samsung Electron. Co. Ltd., Yongin, South Korea
  • fYear
    2012
  • fDate
    13-16 May 2012
  • Firstpage
    95
  • Lastpage
    97
  • Abstract
    In the product development of our company´s Deep Sub Micron Display Driver IC(DDI), we found that inner cell´s and outer cell´s characteristic are significantly different. This problem leads to device yield drop and reliability problem, so we must check the reason why the characteristics changes of inner cell and outer cell were so serious in the array EEPROM cell. First of all, we check the gate oxide area in EEPROM cell on the supposition that inner cell´s and outer cell´s gate oxide thickness are different. After we checked it, we found that the most effective reason of the characteristics changes was Gate Oxide Thickness changes had a decisive effect on the EEPROM Cell´ changes according to the degree of STI profile(Top Corner Rounding). And the difference of STI profile is cause of active pattern difference. In this paper, we suggested the profile improvement method by STI process and characteristics improvement by insulting Dummy cell.
  • Keywords
    EPROM; STI profile; array EEPROM cell active pattern difference; deep sub micron display driver IC; gate oxide thickness; top corner rounding; Arrays; EPROM; Large scale integration; Logic gates; Silicon compounds; Tunneling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microelectronics (MIEL), 2012 28th International Conference on
  • Conference_Location
    Nis
  • ISSN
    pending
  • Print_ISBN
    978-1-4673-0237-1
  • Type

    conf

  • DOI
    10.1109/MIEL.2012.6222805
  • Filename
    6222805