Title :
A trench-isolated power BiCMOS process with complementary high performance vertical bipolars
Author :
Strachan, Andy ; Sethna, Prochy ; Lavrovskaya, Natasha ; Yang, Robert ; Dark, Charlie ; Coppock, Bill
Author_Institution :
Adv. Process Technol. Dev., Nat. Semicond., Santa Clara, CA, USA
Abstract :
A new process for mixed-signal and power management applications is introduced. The process architecture is designed to achieve high VA, high fT complementary 24 V bipolar devices coupled to 0.5 μm CMOS and 24 V power MOS. For optimum performance and die size the process uses 1 μm wide poly-filled trench isolation.
Keywords :
BiCMOS integrated circuits; CMOS integrated circuits; bipolar integrated circuits; 0.5 micron; 1 micron; 24 V; complementary high performance vertical bipolars; die size; mixed-signal power management applications; optimum performance; process architecture; trench-isolated power BiCMOS process; BiCMOS integrated circuits; CMOS process; Doping; Energy management; Etching; Home appliances; Implants; Low voltage; MOS devices; Process design;
Conference_Titel :
Bipolar/BiCMOS Circuits and Technology Meeting, 2002. Proceedings of the 2002
Print_ISBN :
0-7803-7561-0
DOI :
10.1109/BIPOL.2002.1042883
