DocumentCode
2385069
Title
Skinny trace compensation methodology for high speed serial interface
Author
Mi, Minhong ; Taliaferro, Steve ; Murugan, Rajen ; De Araujo, Daniel
Author_Institution
Texas Instrum. Inc., Dallas, TX, USA
fYear
2012
fDate
13-16 May 2012
Firstpage
11
Lastpage
12
Abstract
Skinny trace compensation is a simple yet effective technique for overcoming capacitive impedance discontinuities on high speed channels. This paper provides a comprehensive system-level modeling and analysis methodology for implementing this technique on high speed serial interface. System level simulation correlation to laboratory measurement for the HDMI (High Definition Multimedia Interface) interface on a real high speed low power mobile microprocessor SOC (System on Chip) design is presented.
Keywords
compensation; microprocessor chips; system-on-chip; HDMI; capacitive impedance discontinuity; comprehensive system-level modeling; high definition multimedia interface; high speed channel; high speed serial interface; laboratory measurement; low power mobile microprocessor SOC design; low power mobile microprocessor system on chip design; skinny trace compensation methodology; system level simulation correlation; Abstracts; Loading;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal and Power Integrity (SPI), 2012 IEEE 16th Workshop on
Conference_Location
Sorrento
Print_ISBN
978-1-4673-1503-6
Type
conf
DOI
10.1109/SaPIW.2012.6222900
Filename
6222900
Link To Document