DocumentCode
2385477
Title
IBIS modeling using latency insertion method (LIM)
Author
Schutt-Aine, José E. ; Tan, Jilin ; Liu, Ping ; Al-Hawari, F. ; Varma, Ambrish
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
fYear
2012
fDate
13-16 May 2012
Firstpage
97
Lastpage
100
Abstract
This paper presents an approach for the transient simulation of I/O buffers described by IBIS models. Using the latency insertion method a formulation can be obtained for the transient behavior of IBIS models and external circuitry. The formulation offers better convergence than traditional Newton-Raphson methods and is therefore more robust. Several computer simulations are performed to validate the method.
Keywords
circuit simulation; transient analysis; I/O buffer; IBIS modeling; computer simulations; external circuitry; latency insertion method; transient simulation; Abstracts; Accuracy; Integrated circuit modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal and Power Integrity (SPI), 2012 IEEE 16th Workshop on
Conference_Location
Sorrento
Print_ISBN
978-1-4673-1503-6
Type
conf
DOI
10.1109/SaPIW.2012.6222920
Filename
6222920
Link To Document