• DocumentCode
    2385902
  • Title

    Practical Vth Control Methods for Ni-FUSI/HfSiON MOSFETs on SOI Substrates

  • Author

    Terashima, Koichi ; Manabe, Kenzo ; Takahashi, Kensuke ; Watanabe, Koji ; Ogura, Takashi ; Saitoh, Motofumi ; Oshida, Makiko ; Ikarashi, Nobuyuki ; Tatsumi, Toru ; Watanabe, Hirohito

  • Author_Institution
    Syst. Devices Res. Labs., NEC Corp., Kanagawa
  • fYear
    2006
  • fDate
    11-13 Dec. 2006
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    The methods for controlling threshold voltage (Vth) of Ni-fully-silicide (Ni-FUSI)/HfSiON CMOSFETs on SOI substrates were investigated. We achieved the suitable Vth for both low standby power (LSTP) and low operation power (LOP) devices by using the adjustment of channel doping for NFETs with NiSi gate electrode and the phase controlled (PC) Ni-FUSI technique for PFETs. We also investigated the Vth control by implantation of F and N. Applying the F-implantation technique to Ni-FUSI/HfSiON CMOSFETs on SOI substrates has the possibility to realize Vth control for both LSTP and LOP devices by single phase Ni-FUSI (NiSi) gate electrode
  • Keywords
    MOSFET; hafnium compounds; nickel compounds; oxygen compounds; silicon compounds; silicon-on-insulator; voltage control; CMOSFET; F-implantation technique; HfSiON; MOSFET; N-implantation technique; NFET; NiSi; PFET; SOI substrates; fully-silicide; gate electrode; low operation power devices; low standby power devices; phase controlled technique; threshold voltage control methods; Annealing; CMOSFETs; Control systems; Doping; Electrodes; FETs; Fabrication; High K dielectric materials; MOSFETs; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 2006. IEDM '06. International
  • Conference_Location
    San Francisco, CA
  • Print_ISBN
    1-4244-0439-8
  • Electronic_ISBN
    1-4244-0439-8
  • Type

    conf

  • DOI
    10.1109/IEDM.2006.346760
  • Filename
    4154179