DocumentCode :
2386566
Title :
Robust 45nm porous low-k process integration with well-controlled plasma process damage and moisture uptake
Author :
Matsunaga, Noriaki
Author_Institution :
SoC R&D Center, Toshiba Corp., Yokohama
fYear :
0
fDate :
0-0 0
Firstpage :
1
Lastpage :
4
Abstract :
In this paper, robust 45nm porous low-k process integration with well-controlled plasma process damage and moisture uptake will be discussed
Keywords :
low-k dielectric thin films; moisture; plasma CVD; porous materials; 45 nm; moisture uptake; plasma CVD; porous low-k process integration; well-controlled plasma process damage; Degradation; Dielectric materials; Etching; Large-scale systems; Moisture control; Plasma applications; Plasma materials processing; Plasma measurements; Robustness; Wiring;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Circuit Design and Technology, 2006. ICICDT '06. 2006 IEEE International Conference on
Conference_Location :
Padova
Print_ISBN :
1-4244-0097-X
Type :
conf
DOI :
10.1109/ICICDT.2006.220804
Filename :
1669391
Link To Document :
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